IMCS/Publications/CSJM/Issues/CSJM v.4, n.1 (10), 1996/

Parallel logical control algorithms: verification and hardware implementation

Authors: A. Zakrevskij


A formal language (PRALU) has been proposed for representation of parallel algorithms for logical control. The paper contains a short description of its syntax and semantics, methods of checking PRALU-algorithms for correctness and methods for their hardware implementation. They include using suggested parallel automata as a standard form of algorithms, coding their partial states by ternary vectors, and obtaining appropriate minimized systems of logical equations of the sequent type. The latter ones could be easily implemented by logic nets with matrix structure.

Arkadij Zakrevskij,
Institute of Engineering Cybernetics,
Surganova str. 6,
220012 Minsk, Belarus,


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